Clive 'Max' Maxfield

Let's start with my JPL presentation (I'll waffle on about ESC in a future column). I've been interested in spaceflight since I was a little lad, so I was very excited when the folks at JPL invited me to fly out to Pasadena, California, to talk to them about the state-of-the-art in FPGA technologies, including devices and design and verification tools.

As soon as I'd been checked in through security at JPL (which was about five minutes before I somehow managed to lose my security badge), the first thing I say was a picture of myself plastered on a video screen accompanying an announcement of my talk. (My mother will "dine out" at her hairdressers for weeks on this.)

Truth to tell, I was a wee bit nervous about giving this talk because the folks at JPL are all super-clever and you always worry that you are going to make a bosh of the whole thing. In the event, however, my presentation seemed to go down rather well, and it's spawned some interesting projects that I will relate in a future column.

Following my talk, the folks at the JPL were kind enough to give me a guided tour and I got to see all sorts of mega-cool things, such as the laboratory in which they are assembling and testing the next-generation Mars Rover.

Assembling and testing the next-generation Mars Rover.

Compared to previous rovers, this one is going to be a monster (about the size of a small car). This means that they can't land it the way they did the previous rovers (surrounding them in balloons and bouncing them along the surface of Mars until they come to a halt). So they showed me a simulation of the solution they've decided upon.

A simulation showing the landing of the next-generation Mars Rover.